1. Technical Field
The invention relates to a display, and particularly relates to a gate driving circuit and a driving method thereof.
2. Related Art
A gate driving circuit 100 is used for driving gates of all transistors on each scan line of a display panel, and a typical circuit structure thereof is as shown in FIG. 1. In FIG. 1, only four gate channels ch_1-ch_4 in n gate channels of the gate driving circuit 100 are illustrated, where each gate channel includes a shift register, a logic unit, a level shifter and an output buffer. When an image frame is to be displayed on the display panel (not shown), a timing controller (not shown) outputs a gate driver start pulse GDSP to the gate driving circuit 100. The shift register 121 of the gate channel ch_1 reads the gate driver start pulse GDSP, and generates a delay start pulse g1 to the logic unit 141, and transmits the gate driver start pulse GDSP to the shift register 122 of a next stage. Operations of the other shift register 122-124 can be deduced with reference of the operation of the shift register 121. Therefore, the shift registers 121-124 can determine a driving sequence of each scan line (not shown) of the display panel and sequentially generate the delay start pulses g1-g4, and respectively transmit the delay start pulses g1-g4 to the logic units 141-144. The logic units 141-144 may generate first signals LVS1-LVS4 under control of an output enable signal OE, and transmit the first signals LVS1-LVS4 to the level shifters 161-164 for voltage level processing. Voltage level processed driving signals HVS1-HVS4 respectively drive the gates of the transistors (not shown) on different scan lines of the display panel through the output buffers 181-184. Therefore, according to FIG. 1, it is known that after the typical gate driving circuit 100 receives the gate driver start pulse GDSP, the first signals LVS1-LVS4 are sequentially transmitted through the shift register of each channel.
Each gate channel (for example, the gate channels ch_1-ch_4 shown in FIG. 1) in the typical gate driving circuit 100 includes a level shifter to convert the received first signal into a high voltage signal for outputting. However, when the number of the gate channels is increased, the number of the level shifters are also increased, and the cost of the gate driving circuit is accordingly increased.